Pulse 260 Manuel d'utilisateur Page 4

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Pulse Catch Input
Mode 50
UP Counters
Installation and
Safety Guidelines
7–4
Pulse Catch Input
DL205 High Speed Counter
Interface Manual, 2nd Ed, Rev. A
Understanding V-Memory
Setup Locations
The Pulse Catch Input, Mode 50, associated with the D2-CTRINT requires
V-memory configuration in order to be used.
V-memory location V7633 is the most important of all the reserved memory areas
because it stores the value which lets the CPU know which mode has been selected.
The following diagram shows the 16–bit word and the various information it stores,
including the values used for the Counter Interface Module.
The example shown here uses the Pulse Catch Input, Mode 50, the lower and upper
bits are set to 10 so the backup battery is enabled. Together they form the
hexadecimal number 1050.
015 14 13 12
Memory Location V7633
11 10 123456789
Bits
00000010100 0000
10 0
5
1
D2-CTRINT Mode Setup
Binary Coded Decimal:
00 = Not Used
10 = UP Counting Mode
20 = UP/DOWN Counting Mode
30 = Pulse Output Train
40 = High Speed Interrupts
50 = Pulse Catch Inputs
60 = Discrete Filtered Inputs
Miscellaneous Setup
Binary Coded Decimal:
00 = Not Used (default)
10 = Battery Enabled (DL230/240/250–1/260)
20 = Power Up in Run (DL230 only)
30 = Selects both Battery Enable
and Power Up in Run (DL230 only)
40 = Mode Change Enable in K–sequence (DL240 only)
50 = Battery Enable and Mode Change Enable
in K–sequence (DL240 only)
NOTE: It is important to look at the entire 16 bits at V7633. If the RLL program only
sets the bits in the lower byte when entering the Counter Interface mode value, the
upper bits will be overwritten with zeros (0’s). Always enter a 4-digit BCD value in the
V-memory. This way, the proper value will be written into the upper bits.
There are also other V-memory locations which contain Counter Interface setup
information for each I/O point. They will be automatically configured with default
values for each Counter Interface mode selected.
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